From fd6f1fb6fccc836f714a5f98c60b49d75a85f9f0 Mon Sep 17 00:00:00 2001 From: Andre Meyering Date: Fri, 8 Dec 2017 18:00:53 +0100 Subject: [PATCH] [Serielladdierer] Fixe Grafik --- Kapitel/03_Rechenwerk.tex | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Kapitel/03_Rechenwerk.tex b/Kapitel/03_Rechenwerk.tex index f9b490b..cee1290 100644 --- a/Kapitel/03_Rechenwerk.tex +++ b/Kapitel/03_Rechenwerk.tex @@ -531,7 +531,9 @@ $\Rightarrow$ damit ist das $n$ der nicht-\acs{CLA-PA} noch klein $\Rightarrow$ \draw (3,2.7) -- ++(0.75,0) |- (cout); \draw (-1,2.8) -- ++(2,0); - \node at (0,2.5) {$s_n$}; + \node at (0,2.2) {$s_n$}; + \draw (0,2.8) -- ++(0,-0.4); + \node[knoten] at (0,2.8) {}; % Gate: NOT \node[not gate] at (0.5,5) (NOT) {}; @@ -639,7 +641,9 @@ Zum Vergleich: \acs{RC-PA}: $18n-10$, \dash der \acl{SA} braucht 40 Transistoren \draw (3,2.7) -- ++(0.75,0) |- (cout); \draw (-1,2.8) -- ++(2,0); - \node at (0,2.5) {$s_n$}; + \node at (0,2.2) {$s_n$}; + \draw (0,2.8) -- ++(0,-0.4); + \node[knoten] at (0,2.8) {}; % Gate: NOT \node[not gate] at (0.5,5) (NOT) {};