[Grafiken] Serielladdierer als TikZ Zeichnung übernommen

Kapitel/03_Rechenwerk.tex

@@ -475,10 +475,90 @@ $\Rightarrow$ damit ist das $n$ der nicht-\acs{CLA-PA} noch klein $\Rightarrow$
 
 \begin{figure}[h!]
 	\centering
-	\includegraphics[width=13cm]{Bilder/Serielladdierer.png}
+	\begin{tikzpicture}[font=\sffamily, circuit logic IEC, large circuit symbols,
+		knoten/.style={circle,fill,draw,inner sep=0pt,minimum size=1.5mm}]
+
+		% Rechteck | VA
+		\draw (-2, -1.35) rectangle ++(4,3);
+		\node at (0,0)        (VA)   {VA};
+		\node at (-1.63,1.15) (cin)  {$c_{in}$};
+		\node at (-1.7,0)     (b)    {$b$};
+		\node at (-1.7,-0.9) (a)    {$a$};
+		\node at (1.56,1.15)    (cout) {$c_{out}$};
+		\node at (1.7,-0.9)   (s)    {$s$};
+
+		% Register Eingang
+		\draw (-2.7,-0.2) rectangle ++(-2.1,0.5);
+		\draw (-2.7,0.05) -- ++(0.7,0);
+		\node at (-3.6, 0.05) {$n$-Bit SR};
+		\draw (-4.8, -0.15) -- ++(0.3,0.20) -- ++(-0.3,0.20); % Takt
+		\node at (-2.7, 0.78) {$b_{0}$};
+		\node at (-4.8, 0.8) {$b_{n-1}$};
+
+		\draw (-2.7,-1.2) rectangle ++(-2.1,0.5);
+		\draw (-2.7,-0.95) -- ++(0.7,0);
+		\node at (-3.6, -0.95) {$n$-Bit SR};
+		\draw (-4.8, -1.15) -- ++(0.3,0.20) -- ++(-0.3,0.20); % Takt
+		\node at (-2.7, -1.75) {$a_{0}$};
+		\node at (-4.8, -1.75) {$a_{n-1}$};
+		\foreach \a in {0,...,7} {
+			\draw ($(-2.7,0.3)+(\a*-0.3,0)$) -- ++(0,0.3);
+			\draw ($(-2.7,-1.2)+(\a*-0.3,0)$) -- ++(0,-0.3);
+		}
+
+		% Register Ausgang
+		\draw (2.7,-1.2) rectangle ++(2.1,0.5);
+		\draw (2.7,-0.95) -- ++(-0.7,0);
+		\node at (3.6, -0.95) {$n$-Bit SR};
+		\foreach \a in {0,...,7} {
+			\draw ($(2.7,-0.7)+(\a*0.3,0)$) -- ++(0,0.3);
+		}
+		\draw (4.8, -1.15) -- ++(-0.3,0.20) -- ++(0.3,0.20); % Takt
+		\node at (2.7, -0.25) {$s_{n-1}$};
+		\node at (4.8, -0.25) {$s_{0}$};
+
+		% Beide D-FF
+		\draw (-3, 2.5) rectangle ++(2,1.5);
+		\node at (-1.3, 2.8) {D};
+		\node at (-2.7, 2.8) {Q};
+		\draw (-1, 3.4) -- ++(-0.3,0.24) -- ++(0.3,0.24); % Takt
+		\draw (-3,2.7) -- ++(-0.75,0) |- (cin);
+
+		\draw (1, 2.5) rectangle ++(2,1.5);
+		\node at (2.7, 2.8) {D};
+		\node at (1.3, 2.8) {Q};
+		\draw (3, 3.4) -- ++(-0.3,0.24) -- ++(0.3,0.24); % Takt
+		\draw (3,2.7) -- ++(0.75,0) |- (cout);
+
+		\draw (-1,2.8) -- ++(2,0);
+		\node at (0,2.5) {$s_n$};
+
+		% Gate: NOT
+		\node[not gate] at (0.5,5) (NOT) {};
+		\node[knoten] at (-5.5, 5) {};
+		\node[knoten] at (-0.5, 5) (d1k) {};
+		\draw (d1k) |- ++(-0.5,-1.3);
+
+		\node[knoten] at (3.5, 5) (d2k) {};
+		\draw (d2k) |- ++(-0.5,-1.3);
+
+		% Äußere "Linien"
+		\draw (-5.5, 5.5) -- ++(0, -6.5) -- ++(0.7, 0); % außen links
+		\draw (-5.5, 0) -- ++(0.7,0);
+		\node[knoten] at (-5.5, 0) (d1k) {};
+		\draw (-5.5, 5) -- (NOT.input);
+		\draw (5.5, 5) -- ++(0, -6) -- ++(-0.7, 0); % außen rechts
+		\draw (5.5, 5) -- (NOT.output);
+
+		% Hinweistexte
+		\node at (-5.5,5.8) {Takt};
+		\node at (-3,5.3)   {Eingangstakt};
+		\node at (3,5.3)    {Ausgangstakt};
+
+	\end{tikzpicture}
 	\caption{Serielladdierer}
 	\label{fig:serielladdierer}
-\end{figure}\todo{Als Tikz übernehmen}
+\end{figure}
 
 \subsection{Zeitaufwand ($n$-Bit-SA)}
 
@@ -515,7 +595,82 @@ Zum Vergleich: \acs{RC-PA}: $18n-10$, \dash der \acl{SA} braucht 40 Transistoren
 
 \begin{figure}[ht]
 	\centering
-	\includegraphics[width=13cm]{Bilder/Serielladdierer_3.png}
+	\begin{tikzpicture}[font=\sffamily, circuit logic IEC, large circuit symbols,
+	knoten/.style={circle,fill,draw,inner sep=0pt,minimum size=1.5mm}]
+		% Rechteck | VA
+		\draw (-2, -1.35) rectangle ++(4,3);
+		\node at (0,0)        (VA)   {VA};
+		\node at (-1.63,1.15) (cin)  {$c_{in}$};
+		\node at (-1.7,0)     (b)    {$b$};
+		\node at (-1.7,-0.9) (a)    {$a$};
+		\node at (1.56,1.15)    (cout) {$c_{out}$};
+		\node at (1.7,-0.9)   (s)    {$s$};
+
+		% Register Eingang
+		\draw (-2.7,-0.2) rectangle ++(-2.1,0.5);
+		\draw (-2.7,0.05) -- ++(0.7,0);
+		\node at (-3.6, 0.05) {$n$-Bit SR};
+		\draw (-4.8, -0.15) -- ++(0.3,0.20) -- ++(-0.3,0.20); % Takt
+		\node at (-2.7, 0.78) {$b_{0}$};
+		\node at (-4.8, 0.8) {$b_{n-1}$};
+
+		\draw (-2.7,-1.2) rectangle ++(-2.1,0.5);
+		\draw (-2.7,-0.95) -- ++(0.7,0);
+		\node at (-3.6, -0.95) {$n$-Bit SR};
+		\draw (-4.8, -0.95) -- ++(0.3,0.10) -- ++(-0.3,0.10); % Takt
+		\node at (-2.7, -1.75) {$s_{0}$};
+		\node at (-4.8, -1.75) {$s_{n-1}$};
+		\foreach \a in {0,...,7} {
+			\draw ($(-2.7,0.3)+(\a*-0.3,0)$) -- ++(0,0.3);
+			\draw ($(-2.7,-1.2)+(\a*-0.3,0)$) -- ++(0,-0.3);
+		}
+
+		% Beide D-FF
+		\draw (-3, 2.5) rectangle ++(2,1.5);
+		\node at (-1.3, 2.8) {D};
+		\node at (-2.7, 2.8) {Q};
+		\draw (-1, 3.4) -- ++(-0.3,0.24) -- ++(0.3,0.24); % Takt
+		\draw (-3,2.7) -- ++(-0.75,0) |- (cin);
+
+		\draw (1, 2.5) rectangle ++(2,1.5);
+		\node at (2.7, 2.8) {D};
+		\node at (1.3, 2.8) {Q};
+		\draw (3, 3.4) -- ++(-0.3,0.24) -- ++(0.3,0.24); % Takt
+		\draw (3,2.7) -- ++(0.75,0) |- (cout);
+
+		\draw (-1,2.8) -- ++(2,0);
+		\node at (0,2.5) {$s_n$};
+
+		% Gate: NOT
+		\node[not gate] at (0.5,5) (NOT) {};
+		\node[knoten] at (-5.5, 5) {};
+		\node[knoten] at (-0.5, 5) (d1k) {};
+		\draw (d1k) |- ++(-0.5,-1.3);
+
+		\node[knoten] at (3.5, 5) (d2k) {};
+		\draw (d2k) |- ++(-0.5,-1.3);
+
+		% Äußere "Linien"
+		\draw (-5.5, 5.5) -- ++(0, -6.35) -- ++(0.7, 0); % außen links
+		\draw (-5.5, 0) -- ++(0.7,0);
+		\node[knoten] at (-5.5, 0) (d1k) {};
+		\draw (-5.5, 5) -- (NOT.input);
+		\draw[red] (5.5, 5) -- ++(0, -8) -- ++(-4, 0); % außen rechts
+		\draw (5.5, 5) -- (NOT.output);
+
+		% Hinweistexte
+		\node at (-5.5,5.8) {Takt};
+		\node at (-3,5.3)   {Eingangstakt};
+		\node at (3,5.3)    {Ausgangstakt};
+
+		% Neuer D-FF
+		\draw[red] (-0.5, -3.5) rectangle ++(2,1.5);
+		\node[red] at (1.2, -2.4) {D};
+		\node[red] at (-0.2, -2.4) {Q};
+		\draw[red] (1.5, -3.3) -- ++(-0.3,0.24) -- ++(0.3,0.24); % Takt
+		\draw[red] (1.5, -2.4) -- ++(1,0) |- (s);
+		\draw[red] (-0.5, -2.4) -- ++(-5,0) |- ++(0.7,1.3);
+	\end{tikzpicture}
 	\caption{Serielladdierer mit Hardwareoptimierung}
 	\label{fig:serielladdierer_hw_optimierung}
 \end{figure}