[Grafiken] Serielladdierer als TikZ Zeichnung übernommen
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3 changed files with 158 additions and 3 deletions
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@ -475,10 +475,90 @@ $\Rightarrow$ damit ist das $n$ der nicht-\acs{CLA-PA} noch klein $\Rightarrow$
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\begin{figure}[h!]
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\centering
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\includegraphics[width=13cm]{Bilder/Serielladdierer.png}
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\begin{tikzpicture}[font=\sffamily, circuit logic IEC, large circuit symbols,
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knoten/.style={circle,fill,draw,inner sep=0pt,minimum size=1.5mm}]
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% Rechteck | VA
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\draw (-2, -1.35) rectangle ++(4,3);
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\node at (0,0) (VA) {VA};
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\node at (-1.63,1.15) (cin) {$c_{in}$};
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\node at (-1.7,0) (b) {$b$};
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\node at (-1.7,-0.9) (a) {$a$};
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\node at (1.56,1.15) (cout) {$c_{out}$};
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\node at (1.7,-0.9) (s) {$s$};
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% Register Eingang
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\draw (-2.7,-0.2) rectangle ++(-2.1,0.5);
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\draw (-2.7,0.05) -- ++(0.7,0);
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\node at (-3.6, 0.05) {$n$-Bit SR};
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\draw (-4.8, -0.15) -- ++(0.3,0.20) -- ++(-0.3,0.20); % Takt
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\node at (-2.7, 0.78) {$b_{0}$};
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\node at (-4.8, 0.8) {$b_{n-1}$};
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\draw (-2.7,-1.2) rectangle ++(-2.1,0.5);
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\draw (-2.7,-0.95) -- ++(0.7,0);
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\node at (-3.6, -0.95) {$n$-Bit SR};
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\draw (-4.8, -1.15) -- ++(0.3,0.20) -- ++(-0.3,0.20); % Takt
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\node at (-2.7, -1.75) {$a_{0}$};
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\node at (-4.8, -1.75) {$a_{n-1}$};
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\foreach \a in {0,...,7} {
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\draw ($(-2.7,0.3)+(\a*-0.3,0)$) -- ++(0,0.3);
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\draw ($(-2.7,-1.2)+(\a*-0.3,0)$) -- ++(0,-0.3);
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}
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% Register Ausgang
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\draw (2.7,-1.2) rectangle ++(2.1,0.5);
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\draw (2.7,-0.95) -- ++(-0.7,0);
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\node at (3.6, -0.95) {$n$-Bit SR};
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\foreach \a in {0,...,7} {
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\draw ($(2.7,-0.7)+(\a*0.3,0)$) -- ++(0,0.3);
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}
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\draw (4.8, -1.15) -- ++(-0.3,0.20) -- ++(0.3,0.20); % Takt
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\node at (2.7, -0.25) {$s_{n-1}$};
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\node at (4.8, -0.25) {$s_{0}$};
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% Beide D-FF
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\draw (-3, 2.5) rectangle ++(2,1.5);
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\node at (-1.3, 2.8) {D};
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\node at (-2.7, 2.8) {Q};
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\draw (-1, 3.4) -- ++(-0.3,0.24) -- ++(0.3,0.24); % Takt
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\draw (-3,2.7) -- ++(-0.75,0) |- (cin);
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\draw (1, 2.5) rectangle ++(2,1.5);
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\node at (2.7, 2.8) {D};
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\node at (1.3, 2.8) {Q};
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\draw (3, 3.4) -- ++(-0.3,0.24) -- ++(0.3,0.24); % Takt
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\draw (3,2.7) -- ++(0.75,0) |- (cout);
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\draw (-1,2.8) -- ++(2,0);
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\node at (0,2.5) {$s_n$};
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% Gate: NOT
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\node[not gate] at (0.5,5) (NOT) {};
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\node[knoten] at (-5.5, 5) {};
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\node[knoten] at (-0.5, 5) (d1k) {};
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\draw (d1k) |- ++(-0.5,-1.3);
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\node[knoten] at (3.5, 5) (d2k) {};
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\draw (d2k) |- ++(-0.5,-1.3);
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% Äußere "Linien"
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\draw (-5.5, 5.5) -- ++(0, -6.5) -- ++(0.7, 0); % außen links
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\draw (-5.5, 0) -- ++(0.7,0);
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\node[knoten] at (-5.5, 0) (d1k) {};
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\draw (-5.5, 5) -- (NOT.input);
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\draw (5.5, 5) -- ++(0, -6) -- ++(-0.7, 0); % außen rechts
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\draw (5.5, 5) -- (NOT.output);
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% Hinweistexte
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\node at (-5.5,5.8) {Takt};
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\node at (-3,5.3) {Eingangstakt};
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\node at (3,5.3) {Ausgangstakt};
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\end{tikzpicture}
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\caption{Serielladdierer}
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\label{fig:serielladdierer}
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\end{figure}\todo{Als Tikz übernehmen}
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\end{figure}
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\subsection{Zeitaufwand ($n$-Bit-SA)}
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@ -515,7 +595,82 @@ Zum Vergleich: \acs{RC-PA}: $18n-10$, \dash der \acl{SA} braucht 40 Transistoren
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\begin{figure}[ht]
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\centering
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\includegraphics[width=13cm]{Bilder/Serielladdierer_3.png}
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\begin{tikzpicture}[font=\sffamily, circuit logic IEC, large circuit symbols,
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knoten/.style={circle,fill,draw,inner sep=0pt,minimum size=1.5mm}]
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% Rechteck | VA
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\draw (-2, -1.35) rectangle ++(4,3);
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\node at (0,0) (VA) {VA};
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\node at (-1.63,1.15) (cin) {$c_{in}$};
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\node at (-1.7,0) (b) {$b$};
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\node at (-1.7,-0.9) (a) {$a$};
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\node at (1.56,1.15) (cout) {$c_{out}$};
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\node at (1.7,-0.9) (s) {$s$};
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% Register Eingang
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\draw (-2.7,-0.2) rectangle ++(-2.1,0.5);
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\draw (-2.7,0.05) -- ++(0.7,0);
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\node at (-3.6, 0.05) {$n$-Bit SR};
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\draw (-4.8, -0.15) -- ++(0.3,0.20) -- ++(-0.3,0.20); % Takt
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\node at (-2.7, 0.78) {$b_{0}$};
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\node at (-4.8, 0.8) {$b_{n-1}$};
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\draw (-2.7,-1.2) rectangle ++(-2.1,0.5);
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\draw (-2.7,-0.95) -- ++(0.7,0);
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\node at (-3.6, -0.95) {$n$-Bit SR};
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\draw (-4.8, -0.95) -- ++(0.3,0.10) -- ++(-0.3,0.10); % Takt
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\node at (-2.7, -1.75) {$s_{0}$};
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\node at (-4.8, -1.75) {$s_{n-1}$};
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\foreach \a in {0,...,7} {
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\draw ($(-2.7,0.3)+(\a*-0.3,0)$) -- ++(0,0.3);
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\draw ($(-2.7,-1.2)+(\a*-0.3,0)$) -- ++(0,-0.3);
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}
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% Beide D-FF
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\draw (-3, 2.5) rectangle ++(2,1.5);
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\node at (-1.3, 2.8) {D};
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\node at (-2.7, 2.8) {Q};
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\draw (-1, 3.4) -- ++(-0.3,0.24) -- ++(0.3,0.24); % Takt
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\draw (-3,2.7) -- ++(-0.75,0) |- (cin);
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\draw (1, 2.5) rectangle ++(2,1.5);
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\node at (2.7, 2.8) {D};
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\node at (1.3, 2.8) {Q};
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\draw (3, 3.4) -- ++(-0.3,0.24) -- ++(0.3,0.24); % Takt
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\draw (3,2.7) -- ++(0.75,0) |- (cout);
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\draw (-1,2.8) -- ++(2,0);
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\node at (0,2.5) {$s_n$};
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% Gate: NOT
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\node[not gate] at (0.5,5) (NOT) {};
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\node[knoten] at (-5.5, 5) {};
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\node[knoten] at (-0.5, 5) (d1k) {};
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\draw (d1k) |- ++(-0.5,-1.3);
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\node[knoten] at (3.5, 5) (d2k) {};
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\draw (d2k) |- ++(-0.5,-1.3);
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% Äußere "Linien"
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\draw (-5.5, 5.5) -- ++(0, -6.35) -- ++(0.7, 0); % außen links
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\draw (-5.5, 0) -- ++(0.7,0);
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\node[knoten] at (-5.5, 0) (d1k) {};
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\draw (-5.5, 5) -- (NOT.input);
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\draw[red] (5.5, 5) -- ++(0, -8) -- ++(-4, 0); % außen rechts
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\draw (5.5, 5) -- (NOT.output);
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% Hinweistexte
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\node at (-5.5,5.8) {Takt};
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\node at (-3,5.3) {Eingangstakt};
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\node at (3,5.3) {Ausgangstakt};
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% Neuer D-FF
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\draw[red] (-0.5, -3.5) rectangle ++(2,1.5);
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\node[red] at (1.2, -2.4) {D};
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\node[red] at (-0.2, -2.4) {Q};
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\draw[red] (1.5, -3.3) -- ++(-0.3,0.24) -- ++(0.3,0.24); % Takt
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\draw[red] (1.5, -2.4) -- ++(1,0) |- (s);
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\draw[red] (-0.5, -2.4) -- ++(-5,0) |- ++(0.7,1.3);
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\end{tikzpicture}
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\caption{Serielladdierer mit Hardwareoptimierung}
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\label{fig:serielladdierer_hw_optimierung}
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\end{figure}
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